Digital Electronics

A DAC with reference voltage 5 V and 8 bits has an LSB =……

1. 19.5 mV
2. 39 mV
3. 5 mV
4. 78 mV

A designer needs flexible logic. Best device

1. PAL
2. PLA
3. ROM
4. FPGA

A 1-bit memory can be implemented using

1. 2 XOR gates
2. 2 NOR gates cross-coupled
3. 1 inverter
4. 3 OR gates

RAM is

1. Permanent
2. Volatile
3. Magnetic
4. Optical

Which logic family has the lowest power consumption?

1. TTL
2. ECL
3. CMOS
4. RTL

BCD has how many valid binary combinations?

1. 8
2. 9
3. 10
4. 12

A Johnson counter with 5 FFs generates

1. 5 states
2. 10 states
3. 8 states
4. 16 states

The Boolean function F = Σm(0,2,4,6) corresponds to which simplified form?

1. A′B′
2. B′
3. A′
4. A′C′

Expanding memory size requires

1. Adding ALUs
2. Decoder only
3. Chip select logic
4. Encoder only

Tri-state logic provides

1. High, Low, Open states
2. High, Low, Negative
3. Positive, Negative, Zero
4. High only

Design a counter with the following counting sequence: 0, 1, 3, 7, 6, 4, and repeat. Use T flip-flops.

Describe the weighted-resistor DAC. Derive its output voltage equation

Design a full-subtractor with two half-subtractors and an OR gate.

Simplify the Boolean function:
F = A′B′C′ + B′CD′ + A′BCD′ + AB′C′

Explain the structure and operation of Programmable Logic Arrays (PLA).

Discuss the fabrication characteristics of CMOS devices. Explain why CMOS is preferred in modern VLSI systems.

Implement a full-adder circuit with a 3 × 8 decoder and two OR gates.

Implement JK flip-flop using SR flip-flop.

Implement the Boolean function:
F = AB′CD′ + A′BCD + AB′C′D + A′BC′D
With exclusive-OR and AND gates.

Describe the weighted-resistor DAC. Derive its output voltage equation.

Explain the internal working of the TTL NAND gate using a transistor-level diagram.

Explain CCD (Charge Coupled Device) memory. Describe its operation and practical uses.

Implement the logic expression using a 4:1 mux variable. Assume variable AC as the select line
f(A,B,C) = Σm(1,2,3,5,6,7)

Design a BCD- to-excess-3 code converter logic circuit.

Explain the master-slave flip-flop operation.

Compare JK, T, and D flip-flops.

What is tri-state logic? Explain how it enables bus-oriented communication.

Describe single-slope and dual-slope ADCs.